During fabrication of semiconductor devices, techniques which are potentially destructive, such as plasma etching and ion implantation, are utilized modify the surface of the semiconductor at certain stages of manufacture. Because of the small geometries involved, destructive techniques can impact portions of the circuitry not intended to be treated. This can result in a degradation of performance of the fabricated semiconductor device. It would, therefore, be desirable to have a way of determining the amount of process induced damage which occurs during fabrication of a semiconductor device.
In the prior art, it is common to characterize semiconductor devices by measuring a plurality of parameters, such as Vtlin, Vtsat, Idlin, Idsat, Idoff and Gm. The results of each of those measurements were then evaluated as a measure of quality of the fabricated device. The quality of the fabricated device is inversely related to process induced damage. The problems with the prior art techniques include the necessity of making a plurality of measurements and the difficulty of interpreting a plurality of measurements in order to determine the quality of the end product.